APT Group Theses

This document contains references and links to abstracts for APT group theses for the degrees of MSc (taught), MSc (by research), MPhil and PhD.

PhD

• Bainbridge W.J.,
  Asynchronous System-on-Chip Interconnect.
  PhD Thesis, Dept. of Computer Science, University of Manchester, 2000.
• Bardsley A.,
  Implementing Balsa Handshake Circuits.
  PhD Thesis, Dept. of Computer Science, University of Manchester, 2000.
• Bose, Joy.,
  Engineering a Sequence Machine Through Spiking Neurons Employing Rank-Order Codes
  PhD thesis, School of Computer Science, University of Manchester, 2007.
• Brej, Charles.,
  Early Output Logic and Anti-Tokens
  PhD thesis, School of Computer Science, University of Manchester, 2006.
• Capewell, T. P.,
  Hardware Support for Embedded Java.
  PhD thesis, School of Computer Science, University of Manchester, 2006.
• Efthymiou A.,
  Asynchronous Techniques for Power-Adaptive Processing.
  PhD Thesis, Dept. of Computer Science, University of Manchester, 2002.
• El-Mahdy A.,
  A vector architecture for multimedia Java applications.
  PhD thesis, Dept. of Computer Science, University of Manchester, 2001.
• Endecott P.B.,
  SCALP: A Superscalar Asynchronous Low-Power Processor.
  PhD Thesis, Dept. of Computer Science, University of Manchester, 1996.
• Felicijan T.,
  Quality-of-Service (QoS) for Asynchronous On-Chip Networks.
  PhD Thesis, Dept. of Computer Science, University of Manchester, 2004.
• Gilbert D.A.,
  Dependency and Exception Handling in an Asynchronous Microprocessor.
  PhD Thesis, Dept. of Computer Science, University of Manchester, 1997.
• Hormdee D.,
  Copy-Back Cache Organisation For An Asynchronous Microprocessor.
  PhD Thesis, Dept. of Computer Science, University of Manchester, 2002.
• Horsnell M.J.,
  A Chip Multi-Cluster Architecture with Locality Aware Task Distribution
  PhD Thesis, School of Computer Science, University of Manchester, 2007.
• Janin, L.
  Title: Simulation and Visualisation for Debugging Large Scale Asynchronous Handshake Circuits.
  PhD Thesis, Dept. of Computer Science, University of Manchester, 2005.
• Jason, Ian,
  Title: Run-Time Object Code Compilation to Hardware.
  PhD Thesis, Dept. of Computer Science, University of Manchester, 2008.
• Khan, M. M.,
  Title: Configuring a Massively Parallel CMP System for Real Time Neural Applications
  PhD Thesis, Dept. of Computer Science, University of Manchester, 2009.
• Lewis, M.,
  Low Power Asynchronous Digital Signal Processing
  PhD Thesis, Dept. of Computer Science, University of Manchester, 2000.
• Liu J.,
  Arithmetic and Control Components for an Asynchronous System
  PhD Thesis, Dept. of Computer Science, University of Manchester, 1998.
• Liu Yijun.,
  Power-Efficient Embedded Processing
  PhD Thesis, School of Computer Science, University of Manchester, 2005.
• Nikas, Konstantinos ,
  An Analysis of Cache Partitioning Techniques for Chip Multiprocessor Systems
  PhD Thesis, School of Computer Science, University of Manchester, 2008.
• Okoyo H.O.,
  A Synaptic Logic Neuron Model.
  PhD Thesis, Dept. of Computer Science, University of Manchester, 1998.
• Owen D.,
  Optimisation of Memory Reference Patterns in Dynamic Binary Translation Systems
  PhD Thesis, Dept. of Computer Science, University of Manchester, 2000.
• Paver N.C.,
  The Design and Implementation of an Asynchronous Microprocessor.
  PhD Thesis, Dept. of Computer Science, University of Manchester, 1994.
• Petlin, O. A.,
  Design for testability of asynchronous VLSI circuits
  PhD Thesis, Dept. of Computer Science, University of Manchester, 1996.
• Rogers I.A.,
  Optimsing Java Programs Through Basic Block Dynamic Compilation
  PhD Thesis, Dept. of Computer Science, University of Manchester, 2002.
• Sam, P.,
  Investigating the Scalability of Tiled Chip Multiprocessors Using Multiple Networks.
  PhD Thesis, Dept. of Computer Science, University of Manchester, 2009.
• Scheuer, H.,
  Energy Efficient Computer Architecture.
  PhD Thesis, Dept. of Computer Science, University of Manchester, 1996.
• Sen, Basabdatta B.
  Information Recovery From Rank-Order Encoded Images
  PhD Thesis, School of Computer Science, University of Manchester, 2008.
• Shao, Wei,
  Low Power Viterbi Decoder Designs
  PhD Thesis, Dept. of Computer Science, University of Manchester, 2007.
• Suntiamorntut, Wannarat,
  Energy Efficient Functional Unit for a Parallel Asynchronous DSP
  PhD thesis, School of Computer Science, University of Manchester, 2005.
• Taylor, S.M.,
  Data-Driven Handshake Circuit Synthesis
  PhD Thesis, Dept. of Computer Science, University of Manchester, 2007.
• Theodoropoulos, G.,
  Strategies for the Modelling and Simulation of Asynchronous Computer Architectures.
  PhD Thesis, Dept. of Computer Science, University of Manchester, 1995.
• Toms, William B.,
  Synthesising Quasi-Delay-Insensitive Datapath Circuits
  PhD thesis, School of Computer Science, University of Manchester, 2006.
• Wright G.M.,
  A single-chip multiprocessor architecture with hardware thread support.
  PhD thesis, Dept. of Computer Science, University of Manchester, 2001.
• Zhongchuan Yu,
  An Investigation into the Security of Self-Timed Circuits.
  PhD Thesis, Dept. of Computer Science, University of Manchester, 2004.

MPhil

• Abbasi, I.
  Lossless Image Compression Exploiting Photographic Image Characteristics
  MPhil Thesis, Dept. of Computer Science, University of Manchester, 2008.
• Bardsley, A.,
  Balsa: An Asynchronous Circuit Synthesis System
  MPhil Thesis, Dept. of Computer Science, University of Manchester, 1998.
• Chung, S-H.,
  The Design of a Branch Target Cache for an Asynchronous Microprocessor
  MPhil Thesis, Dept. of Computer Science, University of Manchester, 1998.
• Evans M.,
  Split-datapath execution for low power
  MPhil Thesis, Dept. of Computer Science, University of Manchester, 2001.
• Jantaraprim, C.,
  An Asynchronous DMA Controller
  MPhil Thesis, Dept. of Computer Science, University of Manchester, 2000.
• Liu Yijun,
  Low-Power Asynchronous Multiplier Design.
  MPhil Thesis, Dept. of Computer Science, University of Manchester, 2003.
• Owen D.,
  A Framework for the Emulation of Windowing Systems
  MPhil Thesis, Dept. of Computer Science, University of Manchester, 1997.
• Rogers I.A.,
  Dynamic Compilation of Java Bytecodes
  MPhil Thesis, Dept. of Computer Science, University of Manchester, 1999.
• Sandham J.H.,
  Dynamic Optimisation of x86 Code
  MPhil Thesis, Dept. of Computer Science, University of Manchester, 2000.
• Weigel, F.,
  An Asynchronous ARM Compatible Memory Management Unit Design and Implementation
  MPhil Thesis, Dept. of Computer Science, University of Manchester, 2002.
• Yi, K.K.,
  The Design of a Self-timed Low Power FIFO using a Word-slice Structure
  MPhil Thesis, Dept. of Computer Science, University of Manchester, 1998.

MSc - by research

• Endecott P.B.,
  Processor Architectures for Power Efficiency and Asynchronous Implementation
  MSc Thesis, Dept. of Computer Science, University of Manchester, 1993.
• Farnsworth C.,
  Low Power Implementations of an I2C-Bus Expander,
  MSc Thesis, Dept. of Computer Science, Manchester University, 1994.
• Kelly R.,
  Asynchronous Design Aspects of High-Performance Logic
  Architectural Modelling of a Bipolar Asynchronous Microprocessor
  MSc Thesis, Dept. of Computer Science, Manchester University, 1995.
• Liu J.,
  The Design of an Asynchronous Multiplier
  MSc Thesis, Dept. of Computer Science, University of Manchester, 1995.
• Mehra R.,
  Micropipelined Cache Design Strategies for an Asynchronous Microprocessor.
  MSc Thesis, Dept. of Computer Science, University of Manchester, 1992.
• Petlin O.,
  Random Testing of Asynchronous VLSI Circuits,
  MSc Thesis, Dept. of Computer Science, Manchester University, 1994.
• Samra, S.S.,
  The Design of a low-Power Asynchronous Transform Decoder.
  MSc Thesis, Dept. of Computer Science, Manchester University, 1995.
• Segars, S.A.,
  Low Power Microprocessor Design.
  MSc Thesis, Dept. of Computer Science, Manchester University, 1996.
• Tan S-Y.,
  High-Level Modelling of Micropipelines,
  MSc Thesis, Dept. of Computer Science, Manchester University, 1992.
• York R.,
  Branch Prediction Strategies for Low Power Microprocessor Design,
  MSc Thesis, Dept. of Computer Science, Manchester University, 1994.

MSc - taught course

• Kotselidis E.C.,
  Parallelizing the Jikes RVM.
  MSc Thesis, Dept. of Computer Science, Manchester University, 2006.
• Arechabala J.,
  Test Interface for Micropipelined Units.
  MSc Thesis, Dept. of Computer Science, Manchester University, 1992.
• Ming Chen,
  A Java Virtual Machine For The ARM Processor
  MSc Thesis, Dept. of Computer Science, Manchester University, 2004.
• Dromazou, Nikolitsa
  Sensor Network ad-hoc Communications
  MSc Thesis, Dept. of Computer Science, Manchester University, 2004.
• Farrow, W.F.,
  Modelling and Analysis of High Bandwidth Networks.
  MSc Thesis, Dept. of Computer Science, Manchester University, 1999.
• Georgios Gousios.,
  JikesNODE: A Java Operating System
  MSc Thesis, Dept. of Computer Science, Manchester University, 2004.
• Hormdee D.,
  An Analysis of Asynchronous Microprocessor Pipelines,
  MSc Thesis, Dept. of Computer Science, Manchester University, 1998.
• Lovett W.O.,
  Chip Area Network Simulation,
  MSc Thesis, Dept. of Computer Science, Manchester University, 2002.
• Richard Matley.,
  Native Code Execution Within a JVM
  MSc Thesis, Dept. of Computer Science, Manchester University, 2004.
• Merali, E.M.U.,
  An 8051 to ARM Processor Cross Compiler.
  MSc Thesis, Dept. of Computer Science, Manchester University, 1993.
• Papantonatos, A.,
  Hardware Embedded Firewall for a VoIP Telephone.
  MSc Thesis, Dept. of Computer Science, Manchester University, 2001.
• Swai, O.D.
  A Micropipeline Visualization Tool.
  MSc Thesis, Dept. of Computer Science, Manchester University, 1995.
• Wenchuan Xiong,
  An Amulet2e Demonstrator.
  MSc Thesis, Dept. of Computer Science, Manchester University, 2000.
• Jisheng Zhao.,
  Jikes RVM Adaptive Optimization System with Intelligent Algorithms
  MSc Thesis, Dept. of Computer Science, Manchester University, 2004.